Adding several SPI slaves to one RPi SPI bus and adding several SPI buses to one RPi

Basic Information:

Printer Model: CTC A13
MCU / Printerboard: SKR 2

Hi, I’m a rookie and this is my first question here.

When I want to add a device to an SPI bus, how do I instantiate the needed CS (SS) pin in Klipper! I’m too stupid to find the right document :worried:
I guess the wiring should be like this


My question is, how do I instantiate this in Klipper.

Kind regards, hcet14

Look at the code for the adxl345. In the config file you specify a cs_pin. The code is in klippy/extras/

Please be more specific as to what you want to achieve:

@ dockterj and Sineos
You are absolutely right, I was sloppy! I beg your pardon and thanks for your answers. I changed the topic title.

I read a little further in the WWW.

My question were…

Point 1: How to add several SPI slaves to one RPi SPI bus (especially the CS_pins)
Point 2: Adding several SPI buses to one RPi

Point 1: I found this, which makes sense to me:
(3 slaves on one spi_bus) add to /boot/config.txt (or /boot/firmware/config.txt in some distros):

dtoverlay=spi6-3cs,cs0_pin=16,cs1_pin=26,cs1_pin=6 (GPIO pins can be different)

or Be careful, lines must be shorter than 98-character line length limit (previously 78) characters. If a line becomes to long you can use the equivalent long form:


Point 2: check Raspberry Pi 4 - Multiple SPIs and Raspberry Pi 4 - Device Tree

On the same SPI bus you need to differentiate the devices via an own CS pin. MISO, MOSI, SCLK are shared. The active SPI device is chosen by pulling the CS pin high. This is done automatically by Klipper.

Above is the case, e.g. when you share a MAX board on the same SPI bus as your stepper drivers.

On the RPi it is a bit different.

  • Depending on the RPi Model, the SPI buses work differently. Information covered in here is focused on RPi4
    • RPi’s before 4: Only 1 true SPI controller (SPI0) and two SPI mini (SPI1 / SPI2)
    • RPI 4: 5 SPI masters (SPI0, SPI3, SPI4, SPI5, SPI6) and two SPI mini (SPI1 / SPI2)
    • SPI2 is not on the 40 pin header
  • CS is automatically detected by the Kernel. Use cs_pin: rpi:None otherwise strange things will happen and your dog will get abducted by aliens
  • RPi has multiple SPI buses, so best thing is to assign each device on an own bus



dtparam=spi=off #turn off default SPI to use multiple buses


[mcu rpi]
serial: /tmp/klipper_host_mcu

[adxl345 hotend]
cs_pin: rpi:None
spi_bus: spidev5.0

[adxl345 bed]
cs_pin: rpi:None
spi_bus: spidev6.0

Pins for spidev5.0:
12, 35, 38, 40

Pins for spidev6.0:
8, 10, 32, 33

Some additional information:

  • SPI0 and SPI1 pins are on completely different ALT functions from the SPI buses 3 through 6
  • SPI0 and SPI1 partially overlap with SPI4 and SPI6
  • SPI1 and Klipper seems problematic. Best to avoid it
  • If you want to use the buses SPI3 to SPI6 then deactivate the default SPI overlay

Thank you for your quick answer.

I guess every SPI bus works like this.

Yes, e.g.

I guess you refer to ADXL345 Raspberry pi4 multi SPI - #12 by koconnor
But, Raspberry Pi 4 - Multiple SPIs and Raspberry Pi 4 - Device Tree should get writ of that. Do I understand something wrong? Of course we have to consider bandwith and how the whole SPI bus is connected (cables, connectors, etc)!

Thanks a lot.

Yes, I read about that.

Could you please explain why or add a link to read about?

That should be handled here Raspberry Pi 4 - Device Tree, or?

I never had the need to chain multiple SPI on a RPi. I always used dedicated buses. Not sure how the CS auto-detection will behave when you have multiple devices on one bus.
Be brave and try it. Feedback if and how it is working would be appreciated.

Sorry, this would have to be answered by a developer. Just my experience and I think some reports are somewhere here as well. My wild guess is that SPI1 is a “mini SPI” port and whatever this means, Klipper does not like it.

From rppal::spi - Rust

SPI1 is an auxiliary peripheral that’s referred to as mini SPI. According to the BCM2835 documentation, using higher clock speeds on SPI1 requires additional CPU time compared to SPI0, caused by smaller FIFOs and no DMA support. It doesn’t support Mode1 or Mode3.

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