I have a question regarding the system timer on the STM32G0 MCUs. I’m having a hard time understanding how the STM32G0B0 MCU works at all considering that TIM2 is unavailable on that chip.
Is my understanding correct that the F0 and G0 series use TIM2/3 (stm32f0_timer.c) instead of DWT+SYSTICK (armcm_timer.c)? If that is the case, how does stm32f0_timer.c make sure that on the STM32G0B0 it uses TIM3 since I see that the makefile sets the MCU to stm32g0b1xx when running kconfig (the G0B1 variant does have a TIM2, so I don’t see how the code would use TIM3 and work). Please keep in mind that I don’t have a way to test if the G0B0 works. I’m just assuming that it works since it is part of the BTT Manta M4P.
Also, as a side note, why does the stm32G0 serties use a hardware timer instead of DWT+SYSTICK? Afaik, the M0+ core of the STM32G0 should have these capabilities, so it makes me wonder why they are not used.
The mainline Klipper branch only supports stm32g0b1 mcus; it does not support stm32g0b0 mcus. As far as I know, if one tried to run a mainline Klipper stm32g0b1 binary on an stm32g0b0 mcu it would not function.
As you indicated, the stm32g0b1 has a 32bit TIM2 timer, while the stm32g0b0 does not. The code for using this timer is indeed in src/stm32/stm32f0_timer.c. Neither chip has the DWT counter (I don’t know of any cortex-m0 nor cortex-m0+ mcus that have this counter).
Also for clarification, while the BTT marketing says STM32G0B0 for the Manta M4P, the schematic they published on GH says STM32G0B1. I have a Manta M4P running in a printer so I can confirm it works with Klipper, but it’s not accessible at the moment to verify the chip.
About the stm32g0b0, maybe in fact it does work, but only since they are using unvalidated parts or the chip which are not guaranteed to work. See this: EFTON - STM32 gotchas - Gotcha 63
If I were to submit a PR with support for stm32g0b0, stm32g071 and stm32g070, would it be accepted?
Neither chip has the DWT counter
Are you sure about that? I’m really confused about this since if I look at the rm0444 datasheet, the DWT is clearly present. It is also clearly mentioned and described in this presentation document by ST: (can’t post a third link, search for “STM32G0-System-Debug-DBG.pdf”).
The following (Documentation – Arm Developer) says that the DWT is optional in a cortex M0+ implementation, but it can be there, so I think it might actually be there and usable on the stm32g0. Actually, even the stm32f0 should have it according to rm0091. All of these point to the same document for the implementation: “Armv6-M Architecture Reference Manual”.
For the cortex m3, m4 and m7, the DWT data struct and the address are defined by the cmsis-core, but for the cortex m0/m0+ it is not. Could this have been an oversight (being optional and all)?
I’m going to test if this works by manually defining the DWT on a stm32f072 and see if it works as expected. I strongly suspect it will, but it remains to be seen.
It is possible that stm has released stm32g0b0 chips that actually do have a TIM2 hardware block. (It wouldn’t be the first time that a chip manufacturer played these types of marketing games.) I don’t know.
In practice, most arm cortex-m0 (and m0+) chips do have a DWT, but unfortunately the arm-v6 version of the DWT hardware does not have the CYCCNT register. That is, it lacks the 32-bit counter that Klipper needs.
In practice, most arm cortex-m0 (and m0+) chips do have a DWT, but unfortunately the arm-v6 version of the DWT hardware does not have the CYCCNT register. That is, it lacks the 32-bit counter that Klipper needs.
Ouf. I can confirm this. I tried implementing the DWT struct and while the DWT exists, the CYCCNT doesn’t exist and it always reads back as 0, which is unfortunate.
It is possible that stm has released stm32g0b0 chips that actually do have a TIM2 hardware block. (It wouldn’t be the first time that a chip manufacturer played these types of marketing games.) I don’t know.
I’ve implemented the stm32g07x and stm32g0b0 in this branch. I’ll submit a PR after I confirm it works on a nucleo-g070rb board (in a week or two).
