Each chip needs a dedicated clock pin. The clock pin also programs the chip. The number of pulses sets the input channel and sample rate for the next reading. So you don’t want the chip’s sate being messed with due to extra clock pulses. The C code allows interrupts while the timing pin is low (this allows the MCU to do something else, like perform a microstep), so in theory you could be reading from multiple chips at once and this would results in chaos with a single clock pin.
I found a bug with the current Multiplex ADC code that doesn’t yield the best timing fidelity. Currently the chip is sampled at the frequency the chip reports samples. It also uses a clock dead reckoning scheme to save bandwidth. This results in some clock drift and in this application time is equal to z distance, so timing is critical. I got around this by aggressively over sampling the pin and changing the C code to report the whole time (32 bits) from the MCU.
If your applications doesn’t require high timing fidelity then you should be fine with the code as-is.